Improvement of Retention Time Using Pulsed Back Gate Bias on UTBOX SOI Memory Cell (2013)
Source: EUROSOI 2013. Conference titles: European Workshop on Silicon on Insulator Technology, Devices and Circuits. Unidade: EP
Assunto: MICROELETRÔNICA (CONGRESSOS)
ABNT
MARTINO, João Antonio et al. Improvement of Retention Time Using Pulsed Back Gate Bias on UTBOX SOI Memory Cell. 2013, Anais.. Paris: Institut Superieur d'Électronique, 2013. . Acesso em: 14 maio 2024.APA
Martino, J. A., Sasaki, K. R. A., Nissimoff, A., Almeida, L. M., Aoulaiche, M., Simoen, E., & Claeys, C. (2013). Improvement of Retention Time Using Pulsed Back Gate Bias on UTBOX SOI Memory Cell. In EUROSOI 2013. Paris: Institut Superieur d'Électronique.NLM
Martino JA, Sasaki KRA, Nissimoff A, Almeida LM, Aoulaiche M, Simoen E, Claeys C. Improvement of Retention Time Using Pulsed Back Gate Bias on UTBOX SOI Memory Cell. EUROSOI 2013. 2013 ;[citado 2024 maio 14 ]Vancouver
Martino JA, Sasaki KRA, Nissimoff A, Almeida LM, Aoulaiche M, Simoen E, Claeys C. Improvement of Retention Time Using Pulsed Back Gate Bias on UTBOX SOI Memory Cell. EUROSOI 2013. 2013 ;[citado 2024 maio 14 ]